JPH0572619B2 - - Google Patents

Info

Publication number
JPH0572619B2
JPH0572619B2 JP60038167A JP3816785A JPH0572619B2 JP H0572619 B2 JPH0572619 B2 JP H0572619B2 JP 60038167 A JP60038167 A JP 60038167A JP 3816785 A JP3816785 A JP 3816785A JP H0572619 B2 JPH0572619 B2 JP H0572619B2
Authority
JP
Japan
Prior art keywords
data
bus
pointer
transfer
cpu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60038167A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61196349A (ja
Inventor
Masao Murai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical Nippon Telegraph and Telephone Corp
Priority to JP3816785A priority Critical patent/JPS61196349A/ja
Publication of JPS61196349A publication Critical patent/JPS61196349A/ja
Publication of JPH0572619B2 publication Critical patent/JPH0572619B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/167Interprocessor communication using a common memory, e.g. mailbox

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
JP3816785A 1985-02-27 1985-02-27 共通バス制御方法 Granted JPS61196349A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3816785A JPS61196349A (ja) 1985-02-27 1985-02-27 共通バス制御方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3816785A JPS61196349A (ja) 1985-02-27 1985-02-27 共通バス制御方法

Publications (2)

Publication Number Publication Date
JPS61196349A JPS61196349A (ja) 1986-08-30
JPH0572619B2 true JPH0572619B2 (en]) 1993-10-12

Family

ID=12517840

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3816785A Granted JPS61196349A (ja) 1985-02-27 1985-02-27 共通バス制御方法

Country Status (1)

Country Link
JP (1) JPS61196349A (en])

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01232461A (ja) * 1988-03-14 1989-09-18 Agency Of Ind Science & Technol 並列処理制御装置
JP2836283B2 (ja) * 1991-04-11 1998-12-14 日本電気株式会社 バッファ管理方式

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5831437A (ja) * 1981-08-17 1983-02-24 Toshiba Corp デ−タ受信装置
JPS5897944A (ja) * 1981-12-07 1983-06-10 Nec Corp 複数マイクロプロセツサ間デ−タ転送方式
JPS60116064A (ja) * 1983-11-28 1985-06-22 Mitsubishi Electric Corp 分散処理プロセツサ−間通信方式

Also Published As

Publication number Publication date
JPS61196349A (ja) 1986-08-30

Similar Documents

Publication Publication Date Title
EP0226096B1 (en) Multiple-hierarchical-level multiprocessor system
US4763249A (en) Bus device for use in a computer system having a synchronous bus
US3800287A (en) Data processing system having automatic interrupt identification technique
US4674033A (en) Multiprocessor system having a shared memory for enhanced interprocessor communication
CA1247249A (en) System bus means for inter-processor communication
EP0301610B1 (en) Data processing apparatus for connection to a common communication path in a data processing system
US4417303A (en) Multi-processor data communication bus structure
EP0139568B1 (en) Message oriented interrupt mechanism for multiprocessor systems
JPH0572619B2 (en])
US20020091957A1 (en) Multiprocessor array
JP2972491B2 (ja) バス制御機構及び計算機システム
US6058449A (en) Fault tolerant serial arbitration system
US4697268A (en) Data processing apparatus with message acceptance monitoring
US4630197A (en) Anti-mutilation circuit for protecting dynamic memory
EP0193305A2 (en) System interface for coupling standard microprocessor to a communications adapter
US6345332B1 (en) Bus interchange apparatus and dual system for accessing a fault information register without regard to buffer conditions
JPS6155704B2 (en])
JPS6367702B2 (en])
Rimmer The fundamentals of FASTBUS
JPH04225458A (ja) コンピュータ
JP3304503B2 (ja) 2重系マルチプロセッサシステム
JP2859746B2 (ja) カード識別番号分配装置
JP3615306B2 (ja) 記憶装置アクセスシステム
JPS61292765A (ja) デ−タ転送方式
JPH0461388B2 (en])

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term